
2010 Microchip Technology Inc.
Preliminary
DS41350E-page 133
PIC18F/LF1XK50
REGISTER 14-3:
PWM1CON: ENHANCED PWM CONTROL REGISTER
R/W-0
PRSEN
PDC6
PDC5
PDC4
PDC3
PDC2
PDC1
PDC0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
PRSEN: PWM Restart Enable bit
1
= Upon auto-shutdown, the ECCPASE bit clears automatically once the shutdown event goes
away; the PWM restarts automatically
0
= Upon auto-shutdown, ECCPASE must be cleared by software to restart the PWM
bit 6-0
PDC<6:0>: PWM Delay Count bits
PDCn = Number of FOSC/4 (4 * TOSC) cycles between the scheduled time when a PWM signal
should transition active and the actual time it transitions active